Re: [rtl] CR0-TS the virus - "clts" the vaccine

[yodaiken@chelm.cs.nmt.edu]

> 
> Ciao.
> 
> The context:
> Linux uses the cpu support for switching processes, that causes the task switched flag (TS) in control register zero (CR0) to be set. When TS is set any fpu instruction triggers a device not available trap, that can be used to dynamically understand that the fpu context need to saved before using it in the current process.
> 
> Unfortunately that sends RTLinux to hell when it uses the fpu too as, depending on what Linux has done while active, the fpu is sending and endless stream of DNA traps. That is the cause of the high jitters, up to milliseconds, that Daniele has been pointing out many many times. As far as I know none of the variants of Linux that are available took care of  that.
> 
> Now that I understood it, it's is simple, and Linux is full of  "clts" before "fsave/frstr", but it has been a real pain for a long time. 
> Is it possible that all the wizards out there  did not know anything?

Aha!

> Now can anybody help me avoiding studying Linux in depth and tell me if:
> - does Linux uses the TS flag or simply clears it, so that I'll know if CR0 must be saved/restored when going back and forth from Linux. Thanks.
> 

Any change to CR0 will cause the TLB to be cleared and, I suspect that
this will cause noticeable performance problems. If you do this, we might
as well add memory protection back in.  Anyway,  linux has a variable
last_task_used_math (or something like that) so a task that uses fp will
TS trap, clts, and set last_task_used_math = current. 
My guess is that  rt_use_fp must do:
                              if last_task_used_math is not null
                                     save fpregs
                              clts anyways
                              
         and then  rt_end_fp_task
                             if last_task_used_math is not null
                                     restore fpregs
                                     set tss (orl 8 into cro)
                  
You probably know all this better than me, so will this work? Is the
performance hit too much?

> To Victor:  you were friendly kidding me when you talked about the donation of a PCI bus analyzer to verify for interactions betweeen the fpu and the disks , weren't you.
> 

Someone has to give us one -) Actually, I'm thinking of trying to get
one of the Altera PCI/FPGA boards and using that.

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