Re: [rtl] Floating point register save & restore???

[yodaiken@chelm.cs.nmt.edu]

My guess is that the TS bit is set and the 400us involves a fp
exception.  Upcoming release I has some improvements to FP code, but 
I don't think that is your problem. Check if the TS bit is set -- 
there is code in rtl/schedules/x86/rtl_fpu_fragment.c to do that
when these delays occur. 

Otherwise, you may have a lousy motherboard/chip set.  Can you 
try it out on a different board?


> 
> We have run into a problem with preserving the floating point unit 
> contents during interrupt handling.
> 
> We are using 2.0.35 linux and the 0.9 rtl kernal on a 90MHz pentium.
> 
> The FSAVE assembly instruction is taking from 1 to 400 usecs to save 
> the contents of the floating point unit. Our data sheets for the old 
> 387 FP unit showed a worst case of 400 clock cycles for the longest 
> FP instruction and 100 cycles for the FSAVE instruction. We figure on 
> a worst case of 500 cycles at 90MHz to give 5.5 usecs.
> 
> We must have gone wrong somewhere. Is there a cache write through
> problem occuring as well? Has anyone come accross this problem or
> have any ideas on what's happening? Any assistance greatly
> appreciated. 
> 
> Thanks,
> 
> Reg Dunlop
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