[rtl] Re: Level sensitive interrupts

[John Carpenter <barak@ticon.net>]

On Fri, 20 Aug 1999, you wrote:
> Hi.
> 
> I just read your message on the RTLinux archive:
> 
>     After reading somw of the documentation/white papers about rtlinux I
> came
>     up with a question.
>     As I understand it, rtlinux emulated interrupt hardware for the
> non-rt
>     linux kernel, so that when the non-rt kernel disables interrupts
> they aren't
>     actually disabled but rather the rt kernel just queues them until
> they are
>     reenabled.  I was wondering how this would work for interrupts that
> are level
>     sensitive, like PCI, and remain active until they are actually dealt
> with.
>     Wouldn't this interrupt just keep coming in, causing the rt lernel
> to keep
>     queueing it and cause a noticable performance impact?  I'm sure I'm
> just
>     missing a cruicial piece of the logic here, I'm just wondering what
> that
>     piece is.  Thanks in advance for any explanations you can provide.
> 
>     John Carpenter
>     software engineer
>     embedded medical devices
>     barak@ticon.net
> 
> We are having just this problem.  While we are in our handler, the
> interrupt is causing the handler to be called before we clear the
> interrupt (we think).  The interrupt is a PCI interrupt.  Have you found
> a solution to this problem?  Is it possible to mask the interrupt?
> 
> Thanks in advance,
> Mitch

Once I actually got around to implementing some code to play with this it
didn't appear to be a problem.  I have a driver for doing acquisition from a
fifo using a PCI busmaster.  Basically I get an interrupt on the ISA bus when
the fifo is half full and set up a busmastering transfer to empty it, the
transfer seems to start and therefore remove the half full condition before I
leave my ISR.  I then have a PCI interrupt than is triggered when the transfer
completes, so that I can process the data and the first thing I do in it is
reset the interrupt condition on the PCI device to prevent another interrupt. 
The whole thing seems to work fine, each of the ISRs has a counter it
increments when called and the numbers it dumps out at the end seem to match up
with what I expect.  I think that the realtime kernel really does disable
interrupts when it is in one of its own handlers, just not when the normal
kernel tries to.  You could tell for sure it your ISR is called while you are
still in it by setting a flag on entry and clearing it on exit, then any time
the flag is already set on entry increment a counter and dump it in the cleanup
routine or write to a fifo or something so you can get real feedback if it
happens.

Oh and don't think to much about how my device is using both PCI and ISA
interrupts, its very custom hardware and it wasn't my idea.

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